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scriptie Soer, Notas de estudo de Mecatrônica

Analysis and comparison of switch-based frequency converters

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2018

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Baixe scriptie Soer e outras Notas de estudo em PDF para Mecatrônica, somente na Docsity! University of Twente Faculty of Electrical Engineering, Mathematics & Computer Science Analysis and comparison of switch-based frequency converters Michiel Soer MSc. Thesis September 2007 Supervisors: prof. dr. ir. B. Nauta dr. ing. E.A.M. Klumperink Z. Ru MSc dr. ir. P.T. de Boer Report number: 067.3226 Chair of Integrated Circuit Design Faculty of Electrical Engineering, Mathematics & Computer Science University of Twente P. O. Box 217 7500 AE Enschede The Netherlands Master Thesis Tayloe Product Detector ii Contents Abstract iii List of symbols vii 1 Introduction 1 2 Mixer Overview 3 2.1 Switching Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1.1 Single balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1.2 Double balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Sampling Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2.1 Single balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2.2 Double balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Tayloe Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3.1 Single balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3.2 Double balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Frequency Converter Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4.1 Single Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4.2 Double Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 Linear Periodically Time Variant Systems 13 3.1 The periodic transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 Strom and Signell theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 Properties of the periodic transfer function . . . . . . . . . . . . . . . . . . . . 17 3.3.1 Symmetry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3.2 Conversion Gain and Noise Figure . . . . . . . . . . . . . . . . . . . . . 17 3.3.3 Time shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3.4 Even-order Harmonic Cancellation . . . . . . . . . . . . . . . . . . . . . 18 3.3.5 IQ Image Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 Mixer Analysis 23 4.1 Switching Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1.1 Single Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1.2 Double Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.2 Sampling Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2.1 Single Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 v CONTENTS Master Thesis 4.2.2 Double Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.3 Frequency Converter Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.3.1 Single Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.3.2 Double Balanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5 Mixer Parameter Exploration 37 5.1 Parameter Sweep . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.1 Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.2 RC frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1.3 The big picture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.2 Approximations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6 RF Frontend Design 43 6.1 Top Level Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 6.2 Circuit Level Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.2.1 Antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.2.2 Clock Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.2.3 Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.2.4 Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 6.3 Block Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.3.1 Clock Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6.3.2 Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 6.3.3 Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.4 Receiver Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 6.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 7 Conclusions 57 8 Recommendations 59 A Identities 61 B Derivations 63 B.1 Laplace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 B.2 Single Balanced Difference Equation . . . . . . . . . . . . . . . . . . . . . . . . 64 B.3 Double Balanced Difference equation . . . . . . . . . . . . . . . . . . . . . . . . 65 Tayloe Product Detector vi List of symbols Ak,Bk,Ck state matrices of the k-th periodic phase Ac voltage conversion gain D number of periodic phases in a periodic system F noise factor fi input frequency fo output frequency frc cuttoff frequency of RC filter fs clock frequency Gx discrete expression for the state values on switch instances Hn periodic transfer function I identity matrix IIP3 input-referred Intercept point for 3rd order intermodulation distortion k index of periodic phase n harmonic index: fo = fi + nfs NF noise figure in dB pk duty cycle of k-th periodic phase SNR signal power to noise power ratio tk start time of k-th periodic phase Ts clock time period Ts = 1fs U input signal in the Fourier frequency domain X system states in the Fourier frequency domain Y output signal in the Fourier frequency domain vii Master Thesis Tayloe Product Detector 2 Chapter 2 Mixer Overview This chapter gives an overview of the two main passive mixer types used in current designs, as well as the new Tayloe mixer. The functioning of each mixer type is illustrated with a simple example in the time-domain. 2.1 Switching Mixer The switching mixer is the simplest implementation for a mixer. The input signal is multiplied by a 50% duty cycle block wave, thus performing the mixing operation. 2.1.1 Single balanced The single balanced switching mixer multiplies the input signal with a binary 50 percent block wave having frequency fs to obtain frequency translation, see figure 2.1. Two switches alter- nately connect the RC load to the signal and to ground. It is assumed in this simple overview that the cutoff frequency of the RC filter is very high. Figure 2.1: Single balanced switching mixer When a sinusoid with a frequency equal to the clock frequency fs is applied to the input and the switching is in phase so that the maximum conversion gain is achieved, the waveforms are approximated by (figure 2.2): 3 2.1. SWITCHING MIXER Master Thesis Vin(t) = sin(2πfst) (2.1) Vout(t) = { sin(2πfst) 0 < t < Ts2 0 Ts2 < t < Ts (2.2) Figure 2.2: Single balanced sample waveform Conversion gain is calculated roughly by assuming that half of the waveform is clipped away: Ac = 1 Ts ∫ Ts 2 0 sin( 2π Ts t)dt = 1 π ∼= −9.9dB (2.3) The noise figure is 6.9 dB, of which 3 dB is contributed by the noise in the image band (single sideband noise). 2.1.2 Double balanced Double balancing the switching mixer results in the circuit shown in figure 2.3. Because the input signal is double balanced now it can be easily multiplied by -1 through switching the input wires. So during half the time the switching mixer follows the input signal and during the other half it follows the negated input signal. When a sinusoid with a frequency equal to the clock frequency fs is applied to the input and the switching is in phase so that the maximum conversion gain is achieved, the waveforms are approximated by (figure 2.4): Vin(t) = sin(2πfst) (2.4) Vout(t) = { sin(2πfst) 0 < t < Ts2 −sin(2πfst) Ts2 < t < Ts (2.5) Conversion gain is calculated roughly as: Ac = 1 Ts ( ∫ Ts 2 0 sin( 2π Ts t)dt + ∫ Ts Ts 2 −sin(2π Ts t)dt) = 2 π ∼= −3.9dB (2.6) Tayloe Product Detector 4 CHAPTER 2. MIXER OVERVIEW Master Thesis Figure 2.6: Single balanced sample waveform 2.2.2 Double balanced The double balanced sampling mixer is very similar to the single balanced one, see figure 2.7. The input is tracked twice (during the second track the input is negated) and the hold time is halved. Figure 2.7: Double balanced sampling mixer When a sinusoid with a frequency equal to the clock frequency fs is applied to the input and the switching is in phase so that the maximum conversion gain is achieved, the waveforms are approximated by (figure 2.8): Vin(t) = cos(2πfst) (2.10) Vout(t) =  cos(2πfst) 0 < t < Ts10 cos(2π Ts10 ) Ts 10 < t < Ts 2 −cos(2πfst) Ts2 < t < 6Ts 10 −cos(2π 610) 6Ts 10 < t < Ts (2.11) Conversion gain is calculated roughly as: Tayloe Product Detector 7 2.3. TAYLOE MIXER Master Thesis Figure 2.8: Double balanced sample waveform Ac = 1 Ts ( ∫ Ts 10 0 cos( 2π Ts t)dt + 4Ts 10 cos( 2π Ts Ts 10 ) (2.12) + ∫ 6Ts 10 5Ts 10 −cos(2π Ts t)dt− 4Ts 10 · cos(2π Ts 6Ts 10 )) ∼= −1.6dB (2.13) Which is almost the same as the single balanced sampling mixer. Again, the noise figure is infinite due to the sampling nature. So double balancing the sampling mixer has almost no effect on performance. Setting the duty cycle to almost 0%, a pure double balanced sampler with zero-order-hold is aquired with 0 dB conversion loss and infinite noise figure. 2.3 Tayloe Mixer A special form of the sampling mixer with 25% duty cycle was patented by Dan Tayloe [1]. This mixer type is not referenced in professional literature but is known among radio amateurs. 2.3.1 Single balanced The Tayloe mixer is actually an extension of the idea of a sampling mixer. In a sampling mixer the input signal is tracked and hold on a capacitor. This idea is extended by adding an extra resistor to limit the bandwidth of the mixer, see figure 2.9. The RC filter now averages the input signal when the switch is on. In this example, a sinusoid with a frequency equal to the clock frequency fs is applied to the input and the switching is in phase as to achieve maximum conversion gain. In the time domain, the mixer is seen to average the samples taken when the switch is closed (figure 2.10). Conversion gain is calculated roughly as: Ac = 4 Ts ∫ Ts 8 −Ts 8 cos( 2π Ts t)dt ∼= −0.9dB (2.14) Tayloe Product Detector 8 CHAPTER 2. MIXER OVERVIEW Master Thesis Figure 2.9: Single balanced tayloe mixer Figure 2.10: Single balanced sample waveform Tayloe Product Detector 9 2.5. SUMMARY Master Thesis Figure 2.14: Double balanced frequency converter model 2.5 Summary The switching mixer is always designed with 50 % duty cycle , resulting in a conversion loss of 3.9dB and Noise Figure of 3.9dB. The sampling mixer has a freely defined duty cycle and can achieve much lower conversion losses, up to the point where it becomes a real sampler and the conversion loss is 0dB. However, its sampler like nature introduces an infinite Noise Figure. The Tayloe Mixer is alike a sampling mixer with 25% duty cycle, but suppresses the noise folding by introducing an RC filter with cutoff frequency lower then the sampling frequency, resulting in a conversion loss of 0.9dB and a finite Noise Figure of 3.9dB. All mixers discussed except the single balanced switching mixer are generalizations of the frequency converter model defined in section 2.4. Any analysis done for the frequency converter model can be converted to the mixer types by setting the duty cycle and bandwidth parameters. The time domain simulation is not suitable for providing specific information about conversion loss and Noise Figure, so a frequency domain approach is needed to determine which mixer gives the best performance. Tayloe Product Detector 12 Chapter 3 Linear Periodically Time Variant Systems For the frequency-domain analysis of frequency translating circuits (like mixers) it is insufficient to use Linear Time Invariant system theory. The LTI system theory has been extended for periodically time-variant systems, which are systems with a finite number of periodically cy- cling linear time-invariant responses. This chapter describes Linear Periodically Time Variant (LPTV) theory and a method for calculating the LPTV response for switching circuits. 3.1 The periodic transfer function The most commonly used type of circuit in Electrical Engineering is the Linear Time Invariant or LTI system. The theory behind such circuits is well understood en can be intuitively used to analyze and design LTI circuits. A different set of circuits can be described as a Linear Periodically Time Variant or LPTV circuit. Again the circuit is linear, but its response changes periodically in time. This means that its impulse response is repetitive with a certain period Ts. Examples of LPTV circuits are usually build out of LTI elements and periodically operated switches. Leung gives a quick introduction in the basics of LPTV systems [7]. In a LPTV system the impulse response is dependent on the time the impulse stimulus is presented to the circuit. Called the periodic impulse response, it is denoted with g(v, u) and is dependent on the two time variables v and u. v is the time the impulse stimulus is presented to the input of the system (also called the launch time) and u is the time elapsed after the impulse stimulus. In a LPTV system, g(v, u) is periodic in v with period Ts. Therefore, the periodic impulse response can be represented as a Fourier series with periodic frequency fs = 1Ts : gn(v) = 1 Ts ∫ Ts 0 g(v, u)e−j2πnfsudu (3.1) From the convolution of input and impulse response, we can derive the frequency reponse of the LPTV system as : Y (fo) = ∞∑ n=−∞ Hn(fo)U(fo − nfs) (3.2) Hn(fo) = ∫ ∞ −∞ gn(v)ej2πfovdv (3.3) 13 3.2. STROM AND SIGNELL THEORY Master Thesis This periodic transfer function can also be written in term of the input frequency fi = fo − nfs, resulting in the reciprocal: Y (fo) = ∞∑ n=−∞ Hn(fi + nfs)U(fi) (3.4) The output spectra of the LPTV system is constructed from an infinite number of shifted input spectra multiplied by their specific transfer function. The transfer function is now two- dimensional in n: the harmonic index and fo: the output frequency. By controlling the transfer function in the n dimensionality, it is possible to control the amount of spectrum that is folded back. This folding property proves useful for mixer circuits, which are supposed to do a frequency translation. In most practical systems, it is necessary to limit the transfer function in the n dimension, as to limit the number of spectra folded back into the output. Therefore Hn should be designed to asymptotically go to zero for larger n. 3.2 Strom and Signell theory For some specific problems the periodic transfer function can be found using Fourier frequency analysis and transforming the result to the form of equation 3.3. The switching and sampling mixer can be analyzed using this method, but the Tayloe Mixer and frequency converter model cannot. A more general methodology for solving LPTV systems is given in the work of Strom and Signell [6]. Their method is used to obtain a closed form expression for the frequency converter model. In the time intervals between switching moments, an LPTV system has a defined LTI re- sponse, which is only valid in the switching interval. The switching interval is referred to as one of the periodic phases of the LPTV system. Strom and Signell describe a method for expanding the LTI description until it is valid for the complete time. Then each periodic phase can be processed with LTI techniques and the summation of all states forms the overall response. The periodic phase nTs < t < nTs + Ts can be divided into D portions (or states), each portion having an LTI response. The k-th state is then referred to as the time period nTs+tk < t < nTs + tk+1 for k = 0, .., D − 1. The duty cycle of each state interval is then defined as pk = tk+1−tk Ts for k = 0, .., D − 1. Each k-th state then has a valid LTI state space description within the interval: d dt xk(t) = Akxk(t) + Bku(t) y(t) = Ckxk(t) (3.5) This LTI description is only valid within nTs + tk < t < nTs + tk+1, so to be able to use Fourier analysis the differential equation has to be made valid in the interval −∞ < t < ∞. In order to keep the states separated, the output of each state must only be non-zero inside its interval. Therefore the functions yk(t) and uk(t) are defined, which are equal to y(t) and u(t) inside the k-th interval, and equal to zero outside the k-th interval: yk(t) = y(t)δk(t),k (3.6) uk(t) = u(t)δk(t),k (3.7) Tayloe Product Detector 14 CHAPTER 3. LINEAR PERIODICALLY TIME VARIANT SYSTEMS Master Thesis 3.3 Properties of the periodic transfer function 3.3.1 Symmetry A fundamental property of the periodic transfer function defined in equation 3.3 is the symmetry in the f = nfs line: Hn(f) = H∗−n(−f) (3.19) a property proved in [6]. This is closely related to the symmetry property of an LTI system which ensure that the complex spectra represent real signals: H(f) = H∗(−f) (3.20) 3.3.2 Conversion Gain and Noise Figure When a mixer is build from a LPTV system, the goal is to translate a single piece of spectrum once through the frequency spectrum without additional components. Since the frequency response of the LPTV system is given by: Y (fo) = ∞∑ n=−∞ Hn(fo)U(fo − nfs) (3.21) Y (fo) = ∞∑ n=−∞ Hn(fi + nfs)U(fi) (3.22) the most interesting frequency translation point is with n = ±1. So, in an ideal situation the transfer function would be zero for all n 6= −1 and unity for n = −1. Because this will not be the case several figures exist to access the performance. The gain of the input signal to the baseband is noted as the Conversion Gain and is simply H−1(fi − fs). In general, the conversion gain is frequency dependent. Because the transfer function for n 6= −1 is in general not equal to zero, noise in frequency bands outside the signal bandwidth are also translated to the baseband. This noise-folding deteriorates the output signal-to-noise ratio (SNR), even if the mixer components are considered noise free. The figure- of-merit for noise performance is expressed as the noise factor: F = SNRin SNRout = Pin Nin Nout Pout (3.23) Where Pin is the power of the input signal at the input, Pout is the power of the input signal at the output, Nin is the noise power at the input and Nout is the noise power at the output. For a single-sideband signal the conversion power gain is given by: Pout = |H−1(fo)|2 Pin (3.24) In the ideal case when the circuit components do not contribute extra noise, the only con- tribution to the output noise is the input noise folded by each harmonic transfer function: Nout = ∞∑ n=−∞ |Hn(fo)|2 Nin = ∞∑ n=−∞ |Hn(fi + nfs)|2 Nin (3.25) Tayloe Product Detector 17 3.3. PROPERTIES OF THE PERIODIC TRANSFER FUNCTION Master Thesis Inserting equation 3.24 and 3.25 into the noise factor equation 3.23: F = Pin Nin ∑∞ n=−∞ |Hn(fo)| 2 Nin |H−1(fo)|2 Pin (3.26) = ∑∞ n=−∞,odd |Hn(fo)| 2 |H−1(fo)|2 (3.27) For convenience the noise factor is converted to decibels and is called the single-sided noise figure: NF (dB) = 10log(F ) (3.28) So the periodic transfer function must asymptotically go to zero as n goes to infinity to obtain a finite noise figure. 3.3.3 Time shift The periodic transfer functions for an LPTV system is given by: Y (fo) = ∞∑ n=−∞ Hn(fi)U(fi) (3.29) Performing a time shift tk on input and output: Y (fo)ej2πfotk = ∞∑ n=−∞ Hn(fi)U(fi)ej2πfitk (3.30) Y (fo) = ∞∑ n=−∞ Hn(fi)ej2π(fi−fo)tkU(fi) (3.31) = ∞∑ n=−∞ Hn(fi)ej2πnfstkU(fi) (3.32) So shifting the clock timing to tk results in a factor ej2πnfstk in the periodic transfer func- tion. This factor is present in equation 3.17, but in it there is another term dependent on tk: Gk(fi)e−j2πfitk . This can only mean that Gk(fi) is of the form: Gk(fi) = G’k(fi)e j2πfitk (3.33) In the Gk(fi) expressions derived in appendix B this is indeed the case. 3.3.4 Even-order Harmonic Cancellation Equation 3.32 shows that a time shift of tk in the clock signals results in the term e−j2πnfstk in the periodic transfer function. Now imagine taking two identical LPTV systems with different phase timing, let’s say that the first system starts at t0,A and the second system starts at t0,B. If the zero phase delay transfer function of a system is equal to Hn,0 then their respective transfer functions are: Hn,A = e−j2πnfst0,AHn,0 (3.34) Hn,B = e−j2πnfst0,BHn,0 (3.35) Tayloe Product Detector 18 CHAPTER 3. LINEAR PERIODICALLY TIME VARIANT SYSTEMS Master Thesis Now let t0,B = t0,A + 12Ts which resembles a timing difference of 180 degrees and subtract the outputs of the two systems, then the total transfer function becomes: Hn = e−j2πnfst0,A(1− e−j2π 1 2 n)Hn,0 (3.36) By inspection, (1 − e−j2π 1 2 n) is zero for even n and double unity for uneven n. This means that all even harmonics are cancelled. In a mixer where even harmonics are unwanted, such a mechanism is very useful. Furthermore, by combining LPTV systems in different ways more harmonic cancellation can be achieved at the cost of greater circuit complexity. 3.3.5 IQ Image Rejection For image rejection, many receivers use a Weaver architecture as shown in figure 3.3. In this architecture, the input signal is mixed by two LO signals differing 90 degrees in phase. The mixed signals are referred to as Inphase (I) and Quadrature (Q) channels. By combining I and Q signal again the image can be completely canceled. Figure 3.3: Weaver architecture To analyze the conventional weaver architecture, let’s consider a single frequency from a bandpass signal. The analysis can be made in the time or in the frequency domain, but a frequency analysis is more useful since for the LPTV systems only a transfer function is available. The bandpass sinusoid is given by: xbp(f) = 1 2 C(f1)δ(f − fc − f1) + 1 2 C∗(f1)δ(f + fc + f1) (3.37) where f1 is the sinusoid equivalent baseband frequency and C(f1) is the equivalent baseband spectrum of the signal. Working out the multiplication with the cosine and low pass filter the result gives: xi(t) =xbp(t) ∗ 1 2 (δ(f − fc) + δ(f + fc)) (3.38) = 1 4 C(f1)δ(f − f1) + 1 4 C∗(f1)δ(f + 2fc + f1) + 1 4 C(f1)δ(f − 2fc − f1) + 1 4 C∗(f1)δ(f + f1) (3.39) i(t) = 1 4 C(f1)δ(f − f1) + 1 4 C∗(f1)δ(f + f1) (3.40) Tayloe Product Detector 19 3.4. SUMMARY Master Thesis Tayloe Product Detector 22 Chapter 4 Mixer Analysis In this Chapter the switching mixer, sampling mixer and frequency converter model are an- alyzed using the Linear Periodically Time Variant theory presented in the previous chapter. The derivations result in the periodic transfer function for each mixer type. 4.1 Switching Mixer 4.1.1 Single Balanced The signal representation of the single balanced switching mixer is shown in figure 4.1. Figure 4.1: Single balanced switching mixer signal representation The time domain description of the circuit is given by: z(t) = u(t) ∞∑ n=−∞ rect(2 t− t0 Ts − 2n− 1 2 ) (4.1) = u(t) ∞∑ n=−∞ rect( t− t0 − nTs − 14Ts 1 2Ts ) (4.2) = u(t) ∞∑ n=−∞ 1 2 sinc( 1 2 n)ej2πnfs(t−t0− 1 4 Ts) (4.3) paragraph After transformation to the frequency domain: 23 4.1. SWITCHING MIXER Master Thesis Z(fo) = U(fi) ∗ ∞∑ n=−∞ 1 2 sinc( 1 2 n)δ(fo − nfs)e−j2πnfst0e−j2π 1 4 n (4.4) = ∞∑ n=−∞ e−j2πnfst0 1 2 sinc( 1 2 n)e−j2π 1 4 nU(fo − nfs) (4.5) Y (fo) = ∞∑ n=−∞ e−j2πnfst0 1 + j fofrc 1 2 sinc( 1 2 n)e−j2π 1 4 nU(fo − nfs) (4.6) The resulting periodic transfer function is given in figure 4.2. Hn(fo) = e−j2πnfst0 1 + j fofrc 1 2 sinc( 1 2 n)e−j2π 1 4 n (4.7) = e−j2πnfst0 1 + j fofrc 1− e−j2π 1 2 n j2πn (4.8) Note that Hn(fo) is decreasing with increasing n, resulting in a finite Noise Figure. Figure 4.2: Switching Mixer Single Balanced Hn 4.1.2 Double Balanced The signal representation of the double balanced switching mixer is shown in figure 4.3. The two branches each multiply the input signal with a 50% duty cycle blockwave and are then added together. Figure 4.3: Double balanced switching mixer signal representation The time domain description of the circuit is given by: Tayloe Product Detector 24 CHAPTER 4. MIXER ANALYSIS Master Thesis Resulting in a total response of: Y (fo) = A1(fo) + A2(fo) (4.26) = ∞∑ n=−∞ e−j2πnfst0 [ p0sinc(p0n)e−j2π 1 2 p0n + p1sinc(p1 fo fs )e−j2π 1 2 p1 fo fs e−j2πp0n ] U(fo − nfs) (4.27) = ∞∑ n=−∞ e−j2πnfst0 [ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0n ] U(fo − nfs) (4.28) The resulting periodic transfer function is given in figure 4.6. Hn(fo) = e−j2πnfst0 [ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0n ] (4.29) Or in sinc form: Hn(fo) = e−j2πnfst0 [ p0sinc(p0n)e−j2π p0 2 n + p1sinc(p1 fo fs )e−j2π p1 2 fo fs e−j2πp0n ] (4.30) Note that the second part of this equation has a magnitude that does not depend on n, resulting in an infinite Noise Figure due to an infinite number of folding. Figure 4.6: Sampling Mixer Single Balanced Hn 4.2.2 Double Balanced The signal representation of the sampling mixer is shown in figure 4.7. There are four periodic phases: p0 = p2, p1 = p3, p0 + p1 = 12 , p2 + p3 = 1 2 . The analysis is similar to the single balanced case. a1(t) = u(t) ∞∑ n=−∞ rect( t− t0 − nTs − 12p0Ts p0Ts ) (4.31) A1(fo) = ∞∑ n=−∞ e−j2πnfst0p0sinc(p0n)e−j2π 1 2 p0nU(fo − nfs) (4.32) a2(t) = [ u(t) ∞∑ n=−∞ δ(t− t0 − nTs − p0Ts) ] ∗ rect( t− 12p1Ts p1Ts ) (4.33) A2(fo) = ∞∑ n=−∞ e−j2πnfst0p1sinc(p1 fo fs )e−j2π 1 2 p1 fo fs e−j2πp0nU(fo − nfs) (4.34) a3(t) = −u(t) ∞∑ n=−∞ rect( t− t2 − nTs − 12p2Ts p2Ts ) (4.35) A3(fo) = − ∞∑ n=−∞ e−j2πnfst2p2sinc(p2n)e−j2π 1 2 p2nU(fo − nfs) (4.36) Tayloe Product Detector 27 4.2. SAMPLING MIXER Master Thesis Figure 4.7: Double balanced sampling mixer signal representation Because p0 = p2 and t2 = t0 + 12Ts this expression reduces to: A3(fo) = −A1(f0)e−j2π 1 2 n (4.37) a4(t) = [ −u(t) ∞∑ n=−∞ δ(t− t2 − nTs − p2Ts) ] ∗ rect( t− 12p3Ts p3Ts ) (4.38) A4(fo) = − ∞∑ n=−∞ e−j2πnfst0p3sinc(p3 fo fs )e−j2π 1 2 p3 fo fs e−j2πp2nU(fo − nfs) (4.39) Because p1 = p3 and t2 = t0 + 12Ts this expression reduces to: A4(fo) = −A2(f0)e−j2π 1 2 n (4.40) Summing the four branches results in the total response: Y (fo) = A1(fo) + A2(fo) + A3(fo) + A4(fo) (4.41) = ∞∑ n=−∞ e−j2πnfst0(1− e−j2π 1 2 n) [ p0sinc(p0n)e−j2π 1 2 p0n+ p1sinc(p1 fo fs )e−j2π 1 2 p1 fo fs e−j2πp0n ] U(fo − nfs) (4.42) Tayloe Product Detector 28 CHAPTER 4. MIXER ANALYSIS Master Thesis = ∞∑ n=−∞ e−j2πnfst0(1− e−j2π 1 2 n) [ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0n ] U(fo − nfs) (4.43) The resulting periodic transfer function is given in figure 4.8. Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) [ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0n ] (4.44) Or in sinc form: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) [ p0sinc(p0n)e−j2π p0 2 n + p1sinc(p1 fo fs )e−j2π p1 2 fo fs e−j2πp0n ] (4.45) Note that the second part of this equation has a magnitude that does not depend on n, resulting in an infinite Noise Figure due to an infinite number of folding. Figure 4.8: Sampling Mixer Double Balanced Hn 4.3 Frequency Converter Model 4.3.1 Single Balanced To calculate the frequency response of the LPTV network, equation 3.17 has to be evaluated, according to Strom and Signell [6]. In this case, D = 2 and the differential equations of the two phases are:{ dVout(t) dt = − 1 RC Vout(t) + 1 RC Vin(t) , nTs + t0 < t < nTs + t1 dVout(t) dt = 0 , nTs + t1 < t < (n + 1)Ts + t0 (4.46) Instead of the RC time, it is more constructive using the cutoff frequency of the filter, defined as frc = 12πRC . The derivation and evaluation of equation 3.13 is given in Appendix B, resulting in: G(fi) = e j2πp0 fi fs − e−2πp0 frc fs e j2π fi fs − e−2πp0 frc fs 1 1 + j fifrc (4.47) G0(fi) = G(fi)ej2πfit0 (4.48) G1(fi) = G(fi)ej2πfit2 (4.49) G2(fi) = G(fi)ej2πfit2 (4.50) (4.51) The LTI response is easily calculated: phase0 (j2πfoI −A1)−1 = 1j2πfo+2πfrc = 1 2πfrc j fo frc +1 B1 = 2πfrc (4.52) phase1 { (j2πfoI −A2)−1 = 1j2πfo B2 = 0 (4.53) Tayloe Product Detector 29 4.3. FREQUENCY CONVERTER MODEL Master Thesis Hn(fo) = e−j2πnfst0 1 1 + j fofrc [ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0nG(fi)e j2πp1 fi fs ] (4.69) Or in sincform: Hn(fo) = e−j2πnfst0 1 1 + j fofrc ·[ p0 · sinc(p0n)e−j2π p0 2 n + p1 · sinc(p1 fo fs )e−j2π p1 2 fo fs e−j2πp0nG(fi)e j2πp1 fi fs ] (4.70) Given that: G(fi) = e j2πp0 fi fs − e−2πp0 frc fs e j2π fi fs − e−2πp0 frc fs 1 1 + j fifrc (4.71) Figure 4.9: Frequency Converter Model Single Balanced Hn 4.3.2 Double Balanced The double balanced frequency converter model is similar to the single balanced version, but with the double amount of periodic phases. There are four phases so D = 4 and the balancing forces the relationships: p0 = p2, p1 = p3, p0 + p1 = 1 2 , p2 + p3 = 1 2 (4.72) During phase 0 and phase 2 the circuit is a RC filter and during phase 1 and phase 3 the voltage on the capacitors remains static. Therefore the differential equations are given by: RC dVout(t)dt + Vout(t) = Vin(t) , t0 + nTs < t < t1 + nTs Vout(t) = Vout(nTs + t1) , t1 + nTs < t < t2 + nTs RC dVout(t)dt + Vout(t) = −Vin(t) , t2 + nTs < t < t3 + nTs Vout(t) = Vout(nTs + t3) , t3 + nTs < t < t0 + (n + 1)Ts (4.73) The derivation of the difference equation 3.12 is given in appendix B. The resulting equations for Gk(fi) are: G(fi) = − e j2πp0 fi fs − e−2πp0 frc fs e j2π 1 2 fi fs + e−2πp0 frc fs 1 1 + j fifrc (4.74) G0(fi) = G(fi)ej2πfit0 (4.75) G1(fi) = −G(fi)ej2πfit2 (4.76) G2(fi) = −G(fi)ej2πfit2 (4.77) G3(fi) = G(fi)ej2πfit4 (4.78) G4(fi) = G(fi)ej2πfit4 (4.79) The solution to the differential equations in each phase is trivial: Tayloe Product Detector 32 CHAPTER 4. MIXER ANALYSIS Master Thesis phase0,phase2 (j2πfoI −A1)−1 = (j2πfoI −A3)−1 = 1j2πfo+2πfrc = 1 2πfrc j fo frc +1 B1 = B3 = 2πfrc (4.80) phase1,phase3 { (j2πfoI −A2)−1 = (j2πfoI −A4)−1 = 1j2πfo B2 = B4 = 0 (4.81) Equation 3.17 is evaluated for phase 0: X0(fo) = ∞∑ n=−∞ e−j2πnfst0(j2πfoI −A1)−1 [ B1 1− e−j2πnp0 j2πn + fsG0(fi)e−j2πfit0 − fsG1(fi)e−j2πfit1e−j2πnp0 ] U(fi) (4.82) X0(fo) = ∞∑ n=−∞ e−j2πnfst0( 1 2πfrc j fofrc + 1 [ 2πfrc 1− e−j2πnp0 j2πn + fsG(fi)ej2πfit0e−j2πfit0 + fsG(fi)ej2πfit2e−j2πfit1e−j2πnp0 ] U(fi) (4.83) X0(fo) = ∞∑ n=−∞ e−j2πnfst0 [ 1 1 + j fofrc 1− e−j2πnp0 j2πn + 1 + ej2πp1 fi fs e−j2πnp0 (2π frcfs )(1 + j fo frc ) G(fi) ] U(fi) (4.84) Equation 3.17 is evaluated for phase 2: X2(fo) = ∞∑ n=−∞ e−j2πnfst2(j2πfoI −A3)−1 [ B3 1− e−j2πnp2 j2πn + fsG2(fi)e−j2πfit2 − fsG3(fi)e−j2πfit3e−j2πnp2 ] U(fi) (4.85) X2(fo) = ∞∑ n=−∞ e−j2πnfst0e−j2π 1 2 n( 1 2πfrc j fofrc + 1 [ − 2πfrc 1− e−j2πnp2 j2πn − fsG(fi)ej2πfit2e−j2πfit2 − fsG(fi)ej2πfit4e−j2πfit3e−j2πnp2 ] U(fi) (4.86) X2(fo) = ∞∑ n=−∞ −e−j2πnfst0e−j2π 1 2 n [ 1 1 + j fofrc 1− e−j2πnp2 j2πn + 1 + ej2πp3 fi fs e−j2πp2n (2π frcfs )(1 + j fo frc ) G0(fi) ] U(fi) (4.87) Tayloe Product Detector 33 4.3. FREQUENCY CONVERTER MODEL Master Thesis Inspection reveals that X2(fo) = −X0(fo)ej2π 1 2 n.Equation 3.17 is evaluated for phase 1: X1(f0) = ∞∑ n=−∞ e−j2πnfst1(j2πfoI −A2)−1 [ B2 1− e−j2πnp1 j2πn + fsG1(fi)e−j2πfit1 − fsG2(fi)e−j2πfit2e−j2πnp1 ] U(fi) (4.88) X1(f0) = ∞∑ n=−∞ e−j2πnfst1 1 j2π fofs[ −G(fi)ej2πfit2e−j2πfit1 + G(fi)ej2πfit2e−j2πfit2e−j2πnp1 ] U(fi) (4.89) X1(fo) = ∞∑ n=−∞ −e−j2πnfst1 1 j2π fofs G(fi)(e j2πp1 fi fs − e−j2πp1n)U(f − nfs) (4.90) = ∞∑ n=−∞ −e−j2πnfst1 1− e −j2πp1 fofs j2π fofs e j2πp1 fi fs G(fi)U(f − nfs) (4.91) = ∞∑ n=−∞ −e−j2πnfst0 1− e −j2πp1 fofs j2π fofs e−j2πp0ne j2πp1 fi fs G(fi)U(f − nfs) (4.92) Equation 3.17 is evaluated for phase 3: X3(f0) = ∞∑ n=−∞ e−j2πnfst3(j2πfoI −A4)−1 [ B4 1− e−j2πnh3 j2πn + fsG3(fi)e−j2πfit3 − fsG4(fi)e−j2πfit4e−j2πnp3 ] U(fi) (4.93) X3(f0) = ∞∑ n=−∞ e−j2πnfst1e−j2π 1 2 n 1 j2π fofs[ −G(fi)ej2πfit4e−j2πfit3 + G(fi)ej2πfit4e−j2πfit4e−j2πnp3 ] U(fi) (4.94) X3(fo) = ∞∑ n=−∞ −e−j2πnfst1e−j2π 1 2 n 1 j2π fofs G(fi)(e j2πp3 fi fs − e−j2πnp3)U(f − nfs) (4.95) = ∞∑ n=−∞ −e−j2πnfst1e−j2π 1 2 n 1− e −j2πp3 fofs j2π fofs G(fi)e j2πp3 fi fs U(f − nfs) (4.96) = ∞∑ n=−∞ −e−j2πnfst0e−j2π 1 2 n 1− e −j2πp3 fofs j2π fofs e−j2πp0nG(fi)e j2πp3 fi fs U(f − nfs) (4.97) (4.98) Tayloe Product Detector 34 Chapter 5 Mixer Parameter Exploration In this chapter the expressions for the double balanced frequency converter model are examined further. The goal is to derive simpler expressions for important performance figures like con- version gain and noise figure. The periodic transfer function is repeated here for convenience: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) 1 1 + j fofrc ·1− e −j2πp0n j2πn︸ ︷︷ ︸ partA − 1− e −j2πp1 fofs j2π fofs e−j2πponG(fi)e j2πp1 fi fs︸ ︷︷ ︸ partB  (5.1) Given that: G(fi) = − e j2πp0 fi fs − e−2πp0 frc fs e j2π 1 2 fi fs + e−2πp0 frc fs 1 1 + j fifrc (5.2) 5.1 Parameter Sweep By choosing special values for the duty cycle p0 and the bandwidth frc equation 5.1 can be simplified. 5.1.1 Duty Cycle Put the duty cycle to 50 percent, which is p0 = 12 and p1 = 0. Part B now is zero because 1− e−j2πp1 fo fs = 1− e0 = 0 and only part A remains: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) 1 1 + j fofrc 1− e−j2π 1 2 n j2πn (5.3) Which is the expression for the double balanced switching mixer (figure 4.4). 5.1.2 RC frequency First the effect of choosing an infinitely large frc on the periodic transfer function of the double balanced Tayloe mixer is considered. 37 5.2. APPROXIMATIONS Master Thesis For G(fi) the limit is: G(fi) = − e j2πp0 fi fs − e−∞ e j2π 1 2 fi fs + e−∞ 1 1 (5.4) = −ej2πp0 fi fs e −j2π 1 2 fi fs (5.5) The periodic transfer function becomes: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n)[ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e −j2πp0 fofs e j2πp0 fi fs ] (5.6) = e−j2πnfst0(1− e−j2π 1 2 n)[ 1− e−j2πp0n j2πn + 1− e−j2πp1 fo fs j2π fofs e−j2πp0n] (5.7) Which is the expression for the double balanced sampling mixer (figure 4.8). Now make the duty cycle very small so that p0 ∼= 0 and p1 = 12 then the expression becomes: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) 1− e−j2π 1 2 fo fs j2π fofs (5.8) Which is the expression for a double balanced sampler with zero-order-hold. 5.1.3 The big picture The previous two subsections have proved that equation 5.1 describes all the mixer types discussed in Chapter 2 and that different mixer forms arise from different values of the duty cycle p0 and bandwidth frc. Table 5.1 summarizes the conclusions made. Table 5.1: Frequency Converter Parameter Variation frc = ∞ frc < fs p0 = 12 switching mixer p0 = 14 Tayloe mixer 0 < p0 < 12 sampling mixer p0 ≈ 0 sampler + zero-order-hold 5.2 Approximations The equation for G is simplified when two conditions are assumed: • Only the behavior around DC output frequency is concerned: f0 = 0 and fi = nfs • The bandwidth is small with respect to the sampling frequency: frc < 0.1 · fs Tayloe Product Detector 38 CHAPTER 5. MIXER PARAMETER EXPLORATION Master Thesis Substituting the first condition into equation 5.2 result in: G(fi) = − ej2πp0n − e−2πp0 frc fs ej2π 1 2 n + e−2πp0 frc fs 1 1 + j 2πp0n 2πp0 frc fs (5.9) = 2πp0 frcfs 1− e−2πp0 frc fs ej2πp0n − e−2πp0 frc fs 2πp0 frcfs + j2πp0n (5.10) hen taking the limit from frc toward zero to apply the second condition: lim frc→0 [ 2πp0 frcfs 1− e−2πp0 frc fs ej2πp0n − e−2πp0 frc fs 2πp0 frcfs + j2πp0n ] = (5.11) lim frc→0 [ 2πp0 frcfs 1− e−2πp0 frc fs ] · lim frc→0 [ e−j2πp0n − e−2πp0 frc fs 2πp0 frcfs + j2πp0n ] = (5.12) 1 · e j2πp0n − 1 j2πp0n (5.13) Entering this resulting formula for G into part B of equation 5.1 gives: 1− e−j2πp1 fo fs j2π fofs e −j2πpo fofs e−j2πp0n − 1 j2πp0n e j2π 1 2 fi fs = (5.14) −p1 e−j2πp0n − 1 j2πp0n (5.15) Which gives for the total periodic transfer function: Hn(fo) = e−j2πnfst0(1− e−j2π 1 2 n) 1 1 + j fofrc [ 1− e−j2πp0n j2πn + p1 e−j2πp0n − 1 j2πp0n ] (5.16) = e−j2πnfst0(1− e−j2π 1 2 n)(p0 + p1) e−j2πp0n − 1 j2πp0n (5.17) = e−j2πnfst0 (1− e−j2π 1 2 n) 2 sinc(p0n)e−j2π p0 2 n (5.18) This expression is only valid for narrow band operation and for fo ≈ 0. The magnitude is equal to sinc(p0n) for odd n and zero for even n. Using this result, the conversion gain is estimated as sinc(p0) and the noise figure is estimated as: NF (0Hz) = 10 log( ∑ n=odd sinc(p0n) 2 sinc(p0)2 ) (5.19) Evaluations of this equation and equation 5.1 show that the estimate for the noise figure is also valid for f0 < fs. Figure 5.1 show these expressions evaluated for some values of p0. The case where p0 = 14 gives the best balance between low conversion loss and low noise figure. Tayloe Product Detector 39 5.3. SUMMARY Master Thesis Tayloe Product Detector 42 Chapter 6 RF Frontend Design In the previous chapter is has been proved that the Tayloe mixer with 25 % duty cycle provides the best balance between noise figure and conversion loss. In this chapter a RF front end is designed using this mixer in standard 65 nm CMOS technology with a maximum gate-channel voltage of 1.2 V. 6.1 Top Level Design A sample front end receiver is designed and simulated. The channel is chosen at 1 GHz with 20 MHz bandwidth. Image rejection is done with quadrature mixing. A double balanced architecture was chosen because of low conversion loss and robustness against second order distortion effects (described by Razavi [10]). Figure 6.1: Receiver Design Figure 6.1 gives an overview of the example receiver. The ideal balun transform the single ended antenna into a double balanced one. The second function of the balun is to provide a DC bias voltage for the mixer and buffers. The Tayloe mixer down converts the signal into an in-phase and quadrature signal at baseband. The buffers provide two times voltage gain to loosen the noise figure requirements of the preceding stages and to convert the moderate 43 6.2. CIRCUIT LEVEL DESIGN Master Thesis output impedance of the mixer into a low output impedance. The target noise figure of the entire receiver is 5.0dB and the linearity should be designed as high as possible. 6.2 Circuit Level Design 6.2.1 Antenna For a double balanced mixer to operate the voltage coming from the antenna should be balanced as well. An ideal balun transforms the single ended voltage into a double balanced voltage. The common mode of the output balanced voltage is set to a bias voltage required for the buffer. Figure 6.2: Balanced antenna model In essence the receiver is sensing the voltage on the antenna. Typical receivers with LNA’s first divide the voltage in half by impedance matching. The input signal power is defined in dBm, as the power dissipated in the 50 Ohm resistor when matching impedances. So at a defined input power, the input voltage at the input port of the receiver (after the antenna) is twice as high for a voltage sensing receiver. The result is two times voltage gain with respect to the impedance matched case. The downside is the reduction of the IPx numbers with 6dB, since the input voltage is twice as high. The trade off is made between voltage gain and linearity. 6.2.2 Clock Driver The mixer requires a clock signal to drive the switches. The focus in this project is not on clock generation, so it is assumed that the required clock signals are available with correct duty cycle and phase. It is further assumed that the clock signals are pure block waves switching between the negative and positive supply rail. In reality no clock generating circuit has these properties, so an inverter buffer is added to add realistic rise and fall times to the block wave and to provide a realistic output impedance. In general, the linearity of a switch becomes better when the driving signal becomes larger in magnitude. Because of supply rail limitations, the maximum clock amplitude available is 1.2V . For design reasons the channel voltage of the switches might be higher then the negative supply rail, so in order to reach maximum channel-gate voltage the clock has to be raised in voltage level as well. Tayloe Product Detector 44 CHAPTER 6. RF FRONTEND DESIGN Master Thesis end receiver blocks on the noise figure. Therefore a buffer is being implemented following the mixer, having two times voltage gain and a high linearity. The inverter has been reported by Nauta [8] to have good linearity properties, so this is used as a base design. The inverter ideally has zero second order distortion and reduced third order distortion. Be- cause of the low supply voltage of 1.2V, only 0.6 V is available per transconductor. Klumperink and Nauta have shown that for low voltage headrooms the MOSFET in strong inversion pro- vides the highest linearity [9]. For higher supply voltages the degenerated MOSFET in strong inversion gives higher performance. Klumperink and Nauta also derive that transconductor design should concentrate on linearity properties, whereas the noise can be optimized by ad- mittance scaling. Figure 6.7: Inverter The inverter schematic is shown in figure 6.7. The PMOS has lower mobility, so its width is scaled to 3.2 times the width of the NMOS to ensure that both transistors have the same gm. The length of PMOS and NMOS is kept at 0.5µm which improves linearity with respect to minimum length transistors. Both the transistors are biased at half the supply rail at 600 mV, ensuring that the gate-source voltage of both transistors is equal. Figure 6.8: Circuit half noise model To achieve two times voltage gain, Av = R · gm = 2. To determine the receiver noise figure, the noise is analyzed from the antenna through one-half of the mixer and one buffer. Figure 6.8 shows the noise contributions from every part of the circuit, only including thermal noise. Because this analysis is focused on one circuit half of the double balanced structure, the antenna impedance is the half of 50Ω. Another way of looking at it is that the balun transforms the antenna impedance to 25Ω. The output referred contribution of each noise source is calculated: Tayloe Product Detector 47 6.3. BLOCK SIMULATION RESULTS Master Thesis v̄2n,antenna = 4kT25Ω · 0.92 · 10 3.9 10 · 22g2mR2L (6.2) v̄2n,NMOS = 4kTγgmR2L (6.3) v̄2n,PMOS = 4kTγgmR2L (6.4) v̄2n,RL = 4kTRL (6.5) Where k is the Boltzmann constant and T is the temperature in Kelvin. According to Leung the noise figure can now be calculated by [7]: NF = 10 · log ( Noutput + Ninternal G ·Ninput ) (6.6) Where Ninternal is the output referred noise power of the noise sources inside the circuit, Noutput is the output referred noise power of the input noise source, Ninput is the input referred noise power of the input noise source and G is the total power gain. Filling in the noise powers: NF = 10 · log ( v̄2n,antenna + v̄2n,NMOS + v̄2n,PMOS + v̄2n,RL 4kT25Ω · 0.92 · (2gmRL)2 ) (6.7) = 10 · log ( 25Ω · 0.92 · 10 3.9 10 · (2gmRL)2 + 2 · γgmR2L + RL 25Ω · 0.92 · (2gmRL)2 ) (6.8) = 10 · log ( 10 3.9 10 + 1 2 1 gm γ + R (2gmR)2 25Ω · 0.92 ) (6.9) = 10 · log ( 10 3.9 10 + 1 2gm (γ + 1Av ) 25Ω · 0.92 ) (6.10) From this equation it can be concluded the noise contribution of the load resistor with respect to the noise contribution of the transistors is determined by the voltage gain Av and γ. In this case Av = 2 and γ = 23 , so the transistors contribute slightly more to the noise then the resistor does. Evaluating this equation for gm = 100mS results in a total receiver front end Noise Figure of 4.4 dB. This leaves some room for flicker noise and a dropping mixer gain for high frequency until the Noise Figure of 5.0 dB is reached. For the NMOS a width of 1000µm is needed and for the PMOS a width of 3200µm is needed to get gm = 100mS. To get the two times voltage gain the load resistor RL is 10Ω. 6.3 Block Simulation Results Simulated performance of the individual front end blocks. 6.3.1 Clock Driver The time response of the CMOS clock driver is shown in figure 6.9. The clock driver ensures a common channel voltage for both NMOS and PMOS, while maintaining the full supply voltage swing over each gate. Tayloe Product Detector 48 CHAPTER 6. RF FRONTEND DESIGN Master Thesis Figure 6.9: Clock bias circuit time response 6.3.2 Mixer The periodic transfer function of the NMOS mixer is shown in figure 6.10, with respect to output frequency and with respect to input frequency. The simulation verifies that the mixer has a conversion loss of 0.9dB since the gain of the first harmonic around DC baseband is 0.9 . Furthermore the bandwidth is lower then 20 MHz, caused by the extra switch resistance of the MOSFET transistors. The simulation shows this extra resistance to be 5Ω per transistor, so equation 6.1 has to be modified: C = 1 2 1 2π · (50 + 10)Ω · 20MHz = 65pF (6.11) Double balancing then requires the output node capacitance to be 130pF to ground. The CMOS mixer has exactly the same transfer function, which is therefore not shown. Figure 6.10: NMOS Conversion Gain To optimize the Noise Figure simulations were performed with different transistor lengths. Figure 6.11 shows the resulting noise figure for both CMOS and NMOS mixer. It appears that the CMOS mixer achieves the same noise figure as the NMOS mixer at half the transistor width. Such is to be expected since a PMOS and NMOS in parallel have effectively twice the width of a single NMOS transistor. Therefore, the transistor width for NMOS is chosen to be Tayloe Product Detector 49 6.4. RECEIVER SIMULATION RESULTS Master Thesis 6.4 Receiver Simulation Results Putting together the designed blocks a total receiver front end is created. Figure 6.15 shows the NMOS front end with all device dimensions. The CMOS receiver is similar. The conversion gain versus output frequency is shown in figure 6.16. The voltage amplification is 3.5 which is equal to 10.5 dB. The noise figure versus output frequency is shown in figure 6.17. In baseband from 1 MHz to 18 MHz the noise figure is below 5.0 dB. Below 1 MHz the flicker noise from the buffer MOSFET’s is raising the noise figure above 5 dB. The IIP3 versus output frequency is shown in figure 6.18. The resulting IIP3 is higher then +12dBm and the -1dB compression point is -5 dBm. DC supply power simulations were performed. The resulting power figures are shown in table 6.1. Table 6.1: DC Power Dissipation Clock Driver Mixer Buffer Total NMOS 4 · 2 mW 0 mW 4 · 11 mW 52 mW CMOS 8 · 2 mW 0 mW 4 · 11 mW 60 mW The balancing of the receiver cancels out antenna radiation. In the presence of mismatch, the circuit will become unbalanced and LO signals can leak through to the antenna. For the NMOS receiver the antenna voltage resulting from the LO signals have been measured while mismatching the width of a single switch resistor in the mixer. In Table 6.2 the mismatch results are shown in V. Table 6.2: NMOS Receiver antenna radiation with a single mismatched transistor f 0% 1% 5% 1 GHz < 100nV 85µV 430µV 3 GHz < 100nV 14µV 76µV 5 GHz < 100nV 30µV 151µV The antenna impedance is 50Ω. Table 6.3 shows the mismatch results in dBm. In a practical CMOS process the mismatch is below 1%, resulting in antenna radiation below -70dBm. Table 6.3: NMOS Receiver antenna radiation with a single mismatched transistor f 0% 1% 5% 1 GHz < −125dBm −72dBm −54dBm 3 GHz < −125dBm −84dBm −70dBm 5 GHz < −125dBm −77dBm −63dBm Tayloe Product Detector 52 CHAPTER 6. RF FRONTEND DESIGN Master Thesis Figure 6.15: NMOS receiver frontend Tayloe Product Detector 53 6.4. RECEIVER SIMULATION RESULTS Master Thesis Figure 6.16: Front end voltage gain Figure 6.17: Front end Noise Figure Figure 6.18: Frontend IIP3 Tayloe Product Detector 54 Chapter 7 Conclusions A model has been presented to analyze the frequency domain behavior of the switching, sam- pling and Tayloe mixer. This frequency converter model has been analyzed using Linear Pe- riodically Time Variant theory, resulting in closed form expressions for the periodic transfer function. With these expressions the conversion gain, bandwidth and Noise Figure of the single and double mixers can be calculated exactly. Furthermore, an approximation of the found periodic transfer function has been formulated for narrowband channels, which directly translates the duty cycle parameter to conversion gain and Noise Figure, and the bandwidth parameter to the baseband bandwidth. It was concluded that a double balanced Tayloe mixer with 25% duty cycle provides the best balance between noise figure (3.9dB) and conversion loss(0.9dB). An example RF receiver front end was designed and simulated in 65 nm CMOS technology. The channel was chosen at 1 GHz with 20 MHz bandwidth. A conversion gain of 10.5 dB was achieved with a noise figure of 5.0 dB. The IIP3 of +12 dBm and -1dB compression point of -5 dBm are limited by the low supply voltage of the output buffers. It can therefore be concluded that a receiver front end with high linearity and moderate noise figure can be implemented using the Tayloe mixer. 57 Master Thesis Tayloe Product Detector 58 Chapter 8 Recommendations In this Master thesis the linearity of the Tayloe mixer was not calculated, but assumed to be high enough due to the passive nature of the mixer. In future work a Volterra series representation of Tayloe mixer might help to calculate the distortion. From a design point of view such a representation might not be necessary since it is easy to design highly linear switch MOSFET’s. But from a theoretical point of view it is satisfying to have the complete picture. The linearity of the simulated front end was limited by the voltage buffers following the mixer. A commonly known trick to improve linearity is to use emitter degeneration, but the supply voltage proved to be too low to take advantage of this trick. It is questionable whether a supply voltage of 1.2V allows for IIP3 numbers much higher then +10dBm for non-feedback gm stages. It might be necessary to put more research into highly linear IF amplifiers with low supply voltages. Also, a feedback amplifier might be one of the options to achieve higher linearity. 59 Master Thesis Dirac pulse x(t)δ(t− t0) = x(t0)δ(t− t0) (A.13) x(t) ∗ δ(t− t0) = x(t− t0) (A.14) A periodic Dirac pulse ( the Dirac comb) can be represented by a Fourier series. The period time is Ts, the period frequency is Fs = 1Ts and the period angular frequency is ωs = 2πFs. x(t) = ∞∑ n=−∞ δ(t− nTs) = 1 Ts ∞∑ n=−∞ ej2πnt 1 Ts (A.15) X(f) = Fs ∞∑ n=−∞ δ(f − nFs) = ∞∑ n=−∞ e−j2πfnTs (A.16) Tayloe Product Detector 62 Appendix B Derivations B.1 Laplace In this section the time response of a first order RC filter is derived. Assuming a sinusoid input, the input/output conditions are defined as: Vin(t) = ej2πfi(t+tp) = ej2πfitpej2πfit (B.1) Vout(0−) = v(0−) (B.2) Transforming Vin(t) to the Laplace domain: Vin(s) = ej2πfitp s− j2πfi (B.3) The differential equation of the circuit is: RC dVout(t) dt + Vout(t) = Vin(t) (B.4) Transforming to the Laplace domain: Vout(s)(sRC + 1) = Vin(s) + RCv(0−) (B.5) Vout(s) = Vin(s) sRC + 1 + RCv(0−) sRC + 1 (B.6) Inserting the Laplace expression for Vin(s): Vout(s) = ej2πfitp (s− j2πfi)(sRC + 1) + RCv(0−) sRC + 1 (B.7) Define RC = 12πfrc : Vout(s) = ej2πfitp · 2πfrc (s− j2πfi)(s + 2πfrc) + v(0−) s + 2πfrc (B.8) Performing partial fraction expansion: Vout(s) = 1 1 + j fifrc ej2πfitp s− j2πfi − 1 1 + j fifrc ej2πfitp s + 2πfrc + v(0−) s + 2πfrc (B.9) 63 B.2. SINGLE BALANCED DIFFERENCE EQUATION Master Thesis Transforming back to the time domain: Vout(t) = 1 1 + j fifrc ej2πfitpej2πfit − 1 1 + j fifrc ej2πfitpe−2πfrct + v(0−)e−2πfrct (B.10) Or in different form: Vout(t)− v(0−)e−2πfrct = ej2πfit − e−2πfrct 1 + j fifrc ej2πfitp (B.11) B.2 Single Balanced Difference Equation The differential equations for the single balanced Tayloe mixer are given by:{ RC dVout(t)dt + Vout(t) = Vin(t) , t0 + nTs < t < t1 + nTs Vout(t) = Vout(nTs + t1) , t1 + nTs < t < t0 + (n + 1)Ts (B.12) Assuming a sinusoid input: Vin(t) = ejωit (B.13) For phase 0 equation B.11 is used to calculate the final value at nTs + t1, therefore t = p0Ts and tp = nTs + t0: Vout(nTs + t1)− e−2πfrcp0TsVout(nTs + t0) = ej2πfip0Ts − e−2πfrcp0Ts 1 + j fifrc ej2πfi(nTs+t0) (B.14) For phase 1 the difference equation is trivial: Vout((n + 1)Ts + t0) = Vout(nTs + t1) (B.15) Combining the two difference equations: Vout((n+1)Ts+t0)−e−2πfrcp0TsVout(nTs+t0) = ej2πfip0Ts − e−2πfrcp0Ts 1 + j fifrc ej2πfinTsej2πfit0 (B.16) By using the substitution En = Vout(nTs + t1) this equation can be solved using the Z- transform: zEn(z)− e−2πfrcp0TsEn(z) = ej2πfip0Ts − e−2πfrcp0Ts 1 + j fifrc︸ ︷︷ ︸ C1(fi) z z − ej2πfiTs︸ ︷︷ ︸ input sinusoid ej2πfit0 (B.17) En(z) = C1(fi) z (z − e−2πfrcp0Ts)(z − ej2πfiTs) ej2πfit0 (B.18) Doing partial fraction expansion: En(z) = C1(fi) [ 1 ej2πfiTs − e−2πfrcp0Ts z z − ej2πfiTs︸ ︷︷ ︸ steady state + 1 e−2πfrcp0Ts − ej2πfiTs 1 z − e−2πfrcp0Ts︸ ︷︷ ︸ initial value ] ej2πfit0 (B.19) Tayloe Product Detector 64 APPENDIX B. DERIVATIONS Master Thesis Now we apply the restricting conditions for double balanced operation: p0 = p2, p1 = p3, p0+ p1 = 12 , p2 + p3 = 1 2 . The resulting difference equation becomes: Vout((n + 1)Ts + t0)− e−2πfrc2p0TsVout(nTs + t0) = (ej2πfip0Ts − e−2πfrcp0Ts)(−ej2πfi 1 2 Ts + e−2πfrcp0Ts) 1 + j fifrc ej2πfinTsej2πfit0 (B.44) By using the substitution En = Vout(nTs + t1) this equation can be solved using the Z- transform: zEn(z)−e−2πfrc2hTsEn(z) = (ej2πfip0Ts − e−2πfrcp0Ts)(−ej2πfi 1 2 Ts + e−2πfrcp0Ts) 1 + j fifrc︸ ︷︷ ︸ C2(fi) z z − ej2πfiTs︸ ︷︷ ︸ input sinusoid ej2πfit0 (B.45) En(z) = C2(fi) z (z − e−2πfrc2p0Ts)(z − ej2πfiTs) ej2πfit0 (B.46) Doing partial fraction expansion: En(z) = C2(fi) [ 1 ej2πfiTs − e−2πfrc2p0Ts z z − ej2πfiTs︸ ︷︷ ︸ steady state + 1 e−2πfrc2p0Ts − ej2πfiTs 1 z − e−2πfrc2p0Ts︸ ︷︷ ︸ initial value ] ej2πfit0 (B.47) When we are applying this in the frequency domain, the initial value response is not impor- tant. When doing a frequency domain approach we assume that the sinusoids making up the input signal have been on the input of the circuit for all time. We are not interested in startup phenomenon. Therefore, the value of En in the time domain at the t0 time instants is given by: En = Vout(nTs + t0) = (ej2πfip0Ts − e−2πfrcp0Ts)(−ej2πfi 1 2 Ts + e−2πfrcp0Ts) ej2πfiTs − e−2πfrc2p0Ts 1 1 + j fifrc ej2πfi(nTs+t0) (B.48) En = Vout(nTs + t0) = − ej2πfip0Ts − e−2πfrcp0Ts ej2πfi 1 2 Ts − e−2πfrcp0Ts 1 1 + j fifrc ej2πfi(nTs+t0) (B.49) Since the input is defined as Vin(t) = ej2πfit, we can define a sort of transfer function relating the value of Vout at the instant t0 to the input sinusoid. This transfer function is defined as G0 in the following way: Vout(nTs + t0) = G0(fi)ej2πfinTs (B.50) G(fi) = − ej2πfip0Ts − e−2πfrcp0Ts ej2πfi 1 2 Ts + e−2πfrcp0Ts 1 1 + j fifrc (B.51) G0(fi) = G(fi)ej2πfit0 (B.52) Tayloe Product Detector 67 B.3. DOUBLE BALANCED DIFFERENCE EQUATION Master Thesis The difference equation for phase 2 (equation B.38) can be formed from the difference equa- tion for phase 0 (equation B.39) by substituting ej2πfit0 = −ej2πfit2 . The same substitution in equation B.52 results in the expression for G2(fi): Vout(nTs + t2) = G2(fi)ej2πfinTs (B.53) = −G(fi)ejωit2ej2πfinTs (B.54) Now equations B.37 and B.39 give the expressions for G1, G3 and G4: Vout(nTs + t1) = G1(fi)ej2πfinTs (B.55) = −G(fi)ej2πfit2ej2πfinTs (B.56) Vout(nTs + t3) = G3(2πfi)ej2πfinTs (B.57) = G(fi)ej2πfit4ej2πfinTs (B.58) Vout((n + 1)Ts + t0) = G4(fi)ej2πfinTs (B.59) = G(fi)ej2πfit4ej2πfinTs (B.60) In summary: Vout(nTs + tk) = Gk(ωi)ejωinTs (B.61) G(fi) = − e j2πp0 fi fs − e−2πp0 frc fs e j2π 1 2 fi fs + e−2πp0 frc fs 1 1 + j fifrc (B.62) G0(fi) = G(fi)ej2πfit0 (B.63) G1(fi) = −G(fi)ej2πfit2 (B.64) G2(fi) = −G(fi)ej2πfit2 (B.65) G3(fi) = G(fi)ej2πfit4 (B.66) G4(fi) = G(fi)ej2πfit4 (B.67) Figure B.2: Tayloe Mixer Double Balanced Gk Tayloe Product Detector 68 Bibliography [1] D. Tayloe: Ultra low noise, high performance, zero IF quadrature product detector and preamplifier, March 2003 [2] D.H. van Graas: The fourth method: Generating and Detecting SSB Signals, QEX, Sep- tember 1990 [3] Yasuo Nozawa: The Merigo Method:SSB Generator/Producing A Demodulator, HAM Journal Magazine, July/August 1993 [4] H. Pekau, J.W. Haslett: A 2.4GHz CMOS Sub-Sampling Mixer With Integrated Filtering, IEEE journal of solid state circuits, vol.40 no.11, November 2005 [5] D. Jakonis, C. Svensson: A 1.6 GHz Downconversion Sampling Mixer in CMOS, ISCAS 2003, vol. 1, May 2003 [6] T. Strom, S. Signell: Analysis of periodically switched linear networks, IEEE transactions on circuits and systems, vol cas-24, no 10, October 1977 [7] B. Leung: VLSI for Wireless Communication, Prentice hall electronics and VLSI series, New York: 2002 ch. 4 [8] B. Nauta, E. Seevinck:Linear CMOS Transconductance Element for VHF Filters, Elec- tronic Letter, vol.25 no. 7, March 1989 [9] E.A.M. Klumperink, B. Nauta: Systematic Comparison of HF CMOS Transconductors, IEE transactions on circuits and systems-II: analog and digital signal processing, vol. 50 no. 10, October 2003 [10] B. Razavi: Design Considerations for Direct-Conversion Receivers, IEE transactions on circuits and systems-II: analog and digital signal processing, vol. 44 no. 6, June 1997 69
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